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Micrel, Inc.
ULTRA-PRECISION CML AnyGate(R) WITH INTERNAL INPUT AND OUTPUT TERMINATION
Precision Edge SY58051U
Precision Edge(R) SY58051U (R)
FEATURES
Three matched-delay input pair provide any logic function: AND, NAND, OR, NOR, XOR Guaranteed AC performance over temperature and voltage: * DC-to > 10.7Gbps data rate throughput * DC-to > 7GHz clock fMAX * < 190ps Any In-to-Out tpd * tr / tf < 60ps Ultra low-jitter design: * < 1psRMS random jitter * < 10psPP deterministic jitter * < 10psPP total jitter (clock) Unique input termination and VT pin accepts DCcoupled and AC-coupled inputs (CML, PECL) Internal 50 output source termination Typical 400mV CML output swing (RIN = 50) Internal 50 input termination Power supply 2.5V 5% or 3.3V 10% -40C to 85C temperature range Available in a 16-pin (3mm x 3mm) MLF(R) package Precision Edge(R)
DESCRIPTION
The SY58051U is an ultra-fast, low jitter universal logic gate with a guaranteed maximum data or clock throughput of 10.7Gbps or 7GHz, respectively. This AnyGate (R) differential logic device will produce many logic functions of two Boolean variables, such as AND, NAND, OR, NOR, DELAY, or NEGATION. The SY58051U differential inputs include a unique, internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards, both AC- and DC-coupled without external resistor-bias and termination networks. The result is a clean, stub-free, lowjitter interface solution. The differential CML output is optimized for 50 environments with internal 50 source termination and a 400mV output swing. The SY58051U operates from a 2.5V or 3.3V supply, and is guaranteed over the full industrial temperature range (-40C to +85C). The SY58051U is part of a Micrel's Precision Edge(R) product family. All support documentation can be found on Micrel's web site at www.micrel.com.

APPLICATIONS
Data communication systems OC-192, OC-192+FEC All SONET OC-3 -- OC-768 applications All Fibre Channel applications All GigE applications
FUNCTIONAL BLOCK DIAGRAM
A 50 VTA 50 /A B 50 VTB 50 /B S 50 VTS 50 /S
TYPICAL APPLICATION
0 Q /Q S 1
10Gbps 223-1 PRBS (100mV Input, 400mV Output)
AnyGate and Precision Edge are registered trademarks of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. M9999-020707 hbwhelp@micrel.com or (408) 955-1690
Rev.: C Amendment: /0
1
Issue Date: February 2007
Micrel, Inc.
Precision Edge(R) SY58051U
PACKAGE/ORDERING INFORMATION
GND VCC /A A
Ordering Information(1)
Part Number
12 11 10 9
16
15
14
13
Package Type MLF-16 MLF-16 MLF-16 MLF-16
Operating Range Industrial Industrial Industrial Industrial
Package Marking 051U 051U 051U with Pb-Free bar-line indicator 051U with Pb-Free bar-line indicator
Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu
VTA B /B VTB
1 2 3 4 5 6 7 8
Q GND GND /Q
SY58051UMI SY58051UMITR(2) SY58051UMG(3) SY58051UMGTR(2, 3)
/S
S
VCC
VTS
16-Pin
MLF(R)
(MLF-16)
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number 1 Pin Name VTA Pin Function Input Termination Center Tap: Each of the two inputs, (A, /A) terminates to this pin through a 50 resistor. The VTA pin provides a center-tap to a termination network for maximum interface flexibility. See "Input Interface Applications" section for more details. Differential Input: These input pairs are the two data inputs to the device. Each pin of a pair internally terminates to the VTA or VTB pin to 50. Note that these inputs will default to an indeterminate state if left open. See "Input Interface Applications" section for more details. Input Termination Center Tap: Each of the two inputs, (B, /B) terminates to this pin through a 50 resistor. The VTB pin provides a center-tap to a termination network for maximum interface flexibility. Differential Input: This input pair is the select input to the device. Each pin of this pair internally terminates to the VTS pin to 50. Note that this input will default to an indeterminate state if left open. See "Input Interface Applications" section for more details. Input Termination Center Tap: Each of the two inputs, S, /S terminates to this pin. The VTS pin provides a center-tap to a termination network for maximum interface flexibility. Positive Power Supply. Bypass with 0.1F0.01F low ESR capacitors. Differential Output: This CML output pair is the output of the device. It is a logic function of the A, B, and S inputs. See "Truth Tables" for details. Ground. Exposed pad must be connected to the same potential as GND pin.
15,16 2, 3 4
A, /A B, /B VTB
5, 6
S, /S
7 8, 13 12, 9 10, 11, 14
VTS VCC Q, /Q GND, (Exposed Pad)
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Micrel, Inc.
Precision Edge(R) SY58051U
TRUTH TABLES
A 0 1 X X /A 1 0 X X B X X 0 1 /B X X 1 0 S 0 0 1 1 /S 1 1 0 0 Q 0 1 0 1 /Q 1 0 1 0
VEE 1k
A /A
AND/NAND
A
( )
B L H L H
S L L H H
Q L L L H
( () /Q H H H L
VCC
Q B /Q /B /S S
L L L L
VCC
A /A Q /Q + ( + )
OR/NOR
A L H L H B H H H H S L L H H + Q L H H H ( + ) /Q H L L L
B /B /S S
1k VEE
VCC
A /A Q /Q
DELAY/NEGATION
A L H B X X S S S Q L H /Q H L
500 VEE VCC
B /B /S S
DELAY/NEGATION
A /A
A

B L H
S H H
Q L H
/Q H L
500 VEE

Q B /Q /B /S S
X X
2:1 MUX
A A /A
S
Q
Q A B
/Q A B
B
Q B /Q /B /S S
L H
S
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Micrel, Inc.
Precision Edge(R) SY58051U
Absolute Maximum Ratings(1)
Supply Voltage (VCC) .................................. -0.5V to +4.0V Input Voltage (VIN) ......................................... -0.5V to VCC CML Output Voltage (VOUT) ......... VCC -1.0V to VCC +0.5V Termination Current(3) Source or Sink Current on VTA, VTB, VTS ............... 60mA Input Current Source or Sink Current on A, /A, B, /B, S, /S ....... 30mA Lead Temperature (soldering, 20 sec.) ................... +260C Storage Temperature (TS) ....................... -65C to +150C
Operating Ratings(2)
Supply Voltage (VCC) ...................... +2.375V to +2.625V or ............................................................ +3.0V to +3.6V Ambient Temperature (TA) ......................... -40C to +85C Package Thermal Resistance(4) MLF(R) (JA) Still-Air ............................................................. 61C/W MLF(R) (JB) Junction-to-Board ............................................ 38C/W
DC ELECTRICAL CHARACTERISTICS(5)
TA = -40C to +85C, unless otherwise noted. Symbol VCC ICC RDIFF_IN RIN VIH VIL VIN VDIFF_IN |IIN|
Notes: 1. Permanent device damage may occur if the ratings in the "Absolute Maximum Ratings" section are exceeded. This is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability use for input of the same package only. 4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. JB uses 4-layer JA in still-air, unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 6. Due to the internal termination (see Figure 1a) the input current depends on the applied voltages at A, /A and VTA inputs, the B, /B and VTB inputs or the S, /S and VTS inputs. Do not apply a combination of voltages that causes the input current to exceed the maximum limit!
Parameter Power Supply Power Supply Current Differential Input Resistance (A-to-/A or B-to-/B or S-to-/S) Input Resistance (A-to-VTA, B-to-VTB or S-to-VTS) Input HIGH Voltage (A, /A or B, /B or S, /S) Input LOW Voltage (A, /A or B, /B or S, /S) Input Voltage Swing (A, /A or B, /B or S, /S) Differential Input Voltage Swing |A-, /A| or |B-, /B| or |S-, /S| Input Current (A, /A or B, /B or S, /S)
Condition VCC = 2.5V. VCC = 3.3V. No Load, max. VCC.
Min 2.375 3.0
Typ 2.5 3.3 55
Max 2.625 3.6 70 120 60 VCC VIH-0.1
Units V V mA V V mV mV
80 40 Note 6 Note 6 Note 6 See Figure 2a. Note 6 See Figure 2b. Note 6 1.2 0 100 200
100 50
21
mA
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Micrel, Inc.
Precision Edge(R) SY58051U
CML OUTPUTS DC ELECTRICAL CHARACTERISTICS(7)
VCC = 2.5V 5% or 3.3V 10%; RL = 100 across output pair or equivalent; TA = -40C to +85C; unless otherwise noted. Symbol VOH VOUT VDIFF_OUT ROUT Parameter Output HIGH Voltage Q, /Q Output Voltage Swing Q, /Q Differential Output Voltage Swing Q, /Q Output Source Impedance Q, /Q See Figure 2a. See Figure 2b. Condition Min VCC-0.020 325 650 40 400 800 50 Typ Max VCC 500 1000 60 Units V mV mV
AC ELECTRICAL CHARACTERISTICS(8)
VCC = 2.5V 5% or 3.3V 10%; RL = 100 across output pair or equivalent; TA = -40C to +85C; unless otherwise noted. Symbol fMAX tpd tSKEW tJITTER Parameter Maximum Operating Frequency Propagation Delay Any Input (A, B, S)-to-Q Part-to-Part Skew Data Random Jitter (RJ) Deterministic Jitter (DJ) Clock Cycle-to-Cycle Jitter (RJ) Total Jitter (TJ) tr, tf
Notes: 7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 8. 9. Measured with 100mV input swing. See "Timing Diagrams" section for definition of parameters. High-frequency AC parameters are guaranteed by design and characterization. Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs.
Condition Clock NRZ Data
Min 10.7 70
Typ 7
Max
Units GHz Gbps
190 100 1 10 1 10
ps ps psRMS psPP psRMS psPP ps
Note 9 Note 10 Note 11 Note 12 Note 13 At full output swing. 20
Output Rise/Fall Times (20% to 80%)
60
10. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps/3.2Gbps. 11. Deterministic jitter is measured at 2.5Gbps/3.2Gbps with both K28.5 and 223-1 PRBS pattern. 12. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn-Tn-1 where T is the time between rising edges of the output signal. 13. Total jitter definition: with an ideal clock input of frequency fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value.
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Micrel, Inc.
Precision Edge(R) SY58051U
TIMING DIAGRAM
A /A tpd Q /Q
B /B tpd Q /Q
S /S tpd Q /Q
INPUT AND OUTPUT STAGE INTERNAL TERMINATION
VCC
VCC
50
50
50 /Q Q
A, B, S 50 VTA, VTB, VTS 50 /A, /B, /S
Figure 1a. Simplified Differential Input Stage
Figure 1b. Simplified Differential Output Stage
DEFINITION OF SINGLE-ENDED AND DIFFERENTIAL SWINGS
VIN, VOUT 350mV (typical)
VDIFF_IN, VDIFF_OUT 700mV (typical)
Figure 2a. Single-Ended Swing
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Figure 2b. Differential Swing
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Micrel, Inc.
Precision Edge(R) SY58051U
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, GND = 0, VIN = 800mV.
PROPAGATION DELAY (ps)
PROPAGATION DELAY (ps)
500 450 Q AMPLITUDE (mV) 400 350 300 250 200 150 100 50 0 0 2
Output Swing vs. Frequency
220 200 180 160 140 120
IN-to-Q Propagation Delay vs. Input Swing
200 175 150 125 100 75 50 25
IN-to-Q Propagation Delay vs. Temperature
4 6 8 10 12 FREQUENCY (MHz)
14
100 0
200 400 600 800 1000 1200 INPUT SWING (mV)
0 -60 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) (Forced Air)
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Micrel, Inc.
Precision Edge(R) SY58051U
FUNCTIONAL CHARACTERISTICS
VCC = 3.3V, GND = 0, VIN = 800mV.
622MHz Clock
622Mbps Data (223-1 PRBS)
Output Swing (100mV/div)
/Q Time (200ps/div)
Time (200ps/div)
Output Swing (100mV/div)
Q
10 K28.7 Clock Pattern
1.25GHz Clock
223-1 PRBS Pattern
2.5Gbps Data (223-1 PRBS)
Output Swing (100mV/div)
/Q Time (100ps/div)
Time (50ps/div)
Output Swing (100mV/div)
Q
10 K28.7 Clock Pattern
2.5GHz Clock Q
Outpu Swing (100mV/div)
Output Swing (100mV/div)
223-1 PRBS Pattern
3.2Gbps Data (223-1 PRBS)
/Q Time (50ps/div)
Time (50ps/div)
10 K28.7 Clock Pattern
7GHz Clock
Output Swing (50mV/div.)
223-1
PRBS Pattern
Q
/Q Time (20ps/div.)
10 K28.7 Clock Pattern
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Micrel, Inc.
Precision Edge(R) SY58051U
INPUT INTERFACE APPLICATIONS
VCC
VCC
VCC
A, B, S
A, B, S
A, B, S /A, /B, /S SY58051U GND
/A, /B, /S 1k GND NC VT
GND NC
Input HIGH level shown
SY58051U
/A, /B, /S SY58051U
VT
NC
VT
Figure 3a. Static Input Level
Figure 3b. LVDS Interface (DC-Coupled)
Figure 3c. CML Interface (DC-Coupled)
Option: VT may be connected to VCC.
VCC 0.01F A, B, S
A, B, S VCC
VCC 0.1F
A, B, S /A, /B, /S
/A, /B, /S VCC GND 0.1F R1 VT R2
Note: R1 = 1k, R2 = 1.4k.
SY58051U
VCC GND 0.1F
/A, /B, /S SY58051U
Rpd
Rpd 0.1F
VCC R1
SY58051U
VT
VT
R2
Note: For 3.3V, Rpd = 100, R1 = 1k , R2 = 1.4k. For 2.5V, Rpd = 50, R1 = 1k , R2 = 1.4k.
Rb
Note: Rb = 50.
Figure 3d. CML Interface (AC-Coupled)
Figure 3e. PECL Interface (DC-Coupled)
Figure 3f. PECL Interface (AC-Coupled)
RELATED PRODUCT AND SUPPORT DOCUMENTATION
Part Number SY58016L SY58052U Function 3.3V 10Gbps Differential CML Line Driver/ Receiver with Internal Termination 10Gbps Clock/Data Retimer with 50 Input Termination MLF(R) Application Note HBW Solutions New Products and Applications Data Sheet Link www.micrel.com/product-info/products/sy58016l.shtml www.micrel.com/product-info/products/sy58052u.shtml www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf www.micrel.com/product-info/products/solutions.shtml
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Micrel, Inc.
Precision Edge(R) SY58051U
16-PIN MicroLeadFrame(R) (MLF-16)
Package EP- Exposed Pad
Die
CompSide Island
Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane
PCB Thermal Consideration for 16-Pin MLF(R) Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 qualification. 2. All parts dry-packaged before shipment. 3. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. M9999-020707 hbwhelp@micrel.com or (408) 955-1690
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